The present invention relates to semiconductor manufacturing and more particularly to the identification of probe areas and bond pad areas on semiconductor devices and wafers.
Many methods are used to create pad metal on the surface of semiconductor devices. A common pad metal is sputter deposited TiN/Al films that is patterned and etched to define the final metal bond pads. Aluminum pad metal is then covered with oxide/nitride passivation. This passivation film is patterned and again selectively etched to define openings through the passivation to expose aluminum metal pads for probing and for wire bonding. Both wire bond locations and the probe sites are defined by a shiny metal surface outlined by openings through surface passivation. Openings to aluminum pads are microscopically visible and used by inspectors and automated vision system to verify the precise placement of probe needles and wire bonds within the confines of the passivation openings.
Thicker pad metals are suited for wire bonding directly over active circuits to avoid damaging fragile devices and to lower metal resistance for power integrated circuits. As pad metal thickens over 1 micron to become power metal, thicker metal is more difficult to cover with a thick passivation film. Therefore, power metals are typically unpassivated and do not have passivation openings to outline the areas where pads are to be probed for testing and where bond wires should be placed on the pads for circuit and component assembly.
Therefore, what is needed is a method of providing visual features for probe and bond pad areas for unpassivated, power metal pads to aid human operators and automated vision systems to quickly locate and inspect for alignment of probes and wire bonds.
In the present state of the art, thick electroplated power metals exhibit high residual film stresses and a polyimide or organic stress buffer layer between the power metal and the brittle underlying passivation. The organic buffer layer planarizes the chip surface such that conformal power metal is also planar on top of polyimide.
Wire bonds are placed so as to avoid bonding onto power metal pad areas where there is no polyimide stress buffer protection and over fragile active devices.
FIG. 1 shows cross-sectional view of a semiconductor device of the present art. To simplify the drawing, active and passive components, for example, transistors, diodes, capacitors, resistors and multiple layers of interconnect metal and interlayer dielectric layers in semiconductor substrate 1 are not drawn under metal lines 22 and pad metals 24, 25 and 26. Passivation 5 covers metal lines 22, and pad metals 24, 25 and 26. Metal lines and pad metal commonly deposited is TiN/Al Passivation is typically plasma oxide/nitride film. Both pad metals and passivation are patterned with photoresist and dry etched to create metal lines 22, metal pads 24, 25 and 26 and to create passivation openings 12.
FIG. 2 shows the addition of intermediate polyimide layer 30. The composition of intermediate layer 30 is alternatively benzocyclobutene (BCB) or another high temperature organic material. Intermediate layer 30 resides over passivation layer 5. Three openings 32 through intermediate polyimide layer 30 are shown directly over three passivation openings 12. Intermediate polyimide layer 30 is spin coated as a liquid. When photo-sensitive polyimide is used, it is UV exposed and polyimide openings 12 developed similar to photoresist. Polyimide is then bake cured. Its surface is planar except at openings 32. Depending upon the type of polyimide used, there is minimum opening size where consistent electrical contacts through both openings 32 and 12 to metal pads 24 and 26 are achieved. Larger opening sizes are not shown to simplify drawings. Opening size smaller than minimum design rules is design violation and not allowed.
FIG. 3 shows the resultant of deposition, electroplating and etch of power metal 40 over intermediate polyimide layer 30. Note that three opening dimples 42 on surface of power metal layer 40 conform over three polyimide openings 32 in polyimide 30. Dimples 42 are created as a result of completely etching through the polyimide. Dimples 42 are used for contacting subsurface components. These three dimples appear under optical microscopy. A gold ball bond 50 is thermal compression bonded onto surface of power metal 40. Dimples 42 are electrical contact points between power metal 40 and pad metals 24 and 26. The gold electroplating on wafers consists of the process of seed metals sputter, followed with photoresist patterning, gold electroplating, resist strip and then seed metal strip.